首页> 外文期刊>IEEE transactions on very large scale integration (VLSI) systems >PXNOR-BNN: In/With Spin-Orbit Torque MRAM Preset-XNOR Operation-Based Binary Neural Networks
【24h】

PXNOR-BNN: In/With Spin-Orbit Torque MRAM Preset-XNOR Operation-Based Binary Neural Networks

机译:PXNOR-BNN:带有自旋轨道转矩MRAM预设/基于XNOR运算的二进制神经网络

获取原文
获取原文并翻译 | 示例
           

摘要

Convolution neural networks (CNNs) have demonstrated superior capability in computer vision, speech recognition, autonomous driving, and so forth, which are opening up an artificial intelligence (AI) era. However, conventional CNNs require significant matrix computation and memory usage leading to power and memory issues for mobile deployment and embedded chips. On the algorithm side, the emerging binary neural networks (BNNs) promise portable intelligence by replacing the costly massive floating-point compute-and-accumulate operations with lightweight bit-wise XNOR and popcount operations. On the hardware side, the computing-in-memory (CIM) architectures developed by the non-volatile memory (NVM) present outstanding performance regarding high speed and good power efficiency. In this paper, we propose an NVM-based CIM architecture employing a Preset-XNOR operation in/with the spin-orbit torque magnetic random access memory (SOT-MRAM) to accelerate the computation of BNNs (PXNOR-BNN). PXNOR-BNN performs the XNOR operation of BNNs inside the computing-buffer array with only slight modifications of the peripheral circuits. Based on the layer evaluation results, PXNOR-BNN can achieve similar performance compared with the read-based SOT-MRAM counterpart. Finally, the end-to-end estimation demonstrates 12.3x speedup compared with the baseline with 96.6-image/s/W throughput efficiency.
机译:卷积神经网络(CNN)在计算机视觉,语音识别,自动驾驶等方面已展现出卓越的功能,这开启了人工智能(AI)时代。但是,常规的CNN需要大量的矩阵计算和内存使用,从而导致移动部署和嵌入式芯片的功耗和内存问题。在算法方面,新兴的二进制神经网络(BNN)通过用轻量级逐位XNOR和popcount运算代替昂贵的大规模浮点计算和累加运算,保证了便携式智能。在硬件方面,由非易失性存储器(NVM)开发的内存计算(CIM)架构在高速和良好的电源效率方面表现出出色的性能。在本文中,我们提出了一种基于NVM的CIM架构,该架构在Preset-XNOR运算中使用自旋轨道扭矩磁性随机存取存储器(SOT-MRAM),以加速BNN(PXNOR-BNN)的计算。 PXNOR-BNN对计算缓冲区阵列内部的BNN执行XNOR操作,只需对外围电路进行少量修改即可。根据层评估结果,与基于读取的SOT-MRAM副本相比,PXNOR-BNN可以实现类似的性能。最后,端到端估计显示出与基线相比,速度提高了12.3倍,吞吐效率为96.6图像/秒/瓦。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号