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A 256×256 pixel smart CMOS image sensor for line-based stereovision applications

机译:用于基于行的立体视觉应用的256×256像素智能CMOS图像传感器

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摘要

This paper presents a 256×256 pixel smart CMOS image sensornfor line based vision applications. By combining the edge-based analognprocessing technique with an active pixel array, a dense and fastnon-chip analog image processing has been achieved. The on-chipnprocessing unit includes (1) an analog histogram equalizer, (2) anprogrammable recursive Gaussian filter, (3) a spatio-temporalndifferentiator, and (4) a local extrema extractor. An electronic shutternis applied to the active pixel sensor array in order to adapt thenexposure time as a function of global illumination. The on-chipnhistogram equalizer extends the image into a constant and optimal rangenfor all the following processing operators and gives a stable andnpredictable precision of the analog processing. A prototype chip hasnbeen designed and fabricated in a standard 0.8-Μm CMOS process withndouble poly and double metal, giving a pixel pitch of 20 Μm and diensize of 7×7 mm2. A line processing time is compatiblenwith TV line scan period. The worst case power consumption measures 40nmA at 5 V
机译:本文提出了一种基于行的视觉应用的256×256像素智能CMOS图像传感器。通过将基于边缘的模拟处理技术与有源像素阵列相结合,可以实现密集且快速的非芯片模拟图像处理。片上处理单元包括:(1)模拟直方图均衡器;(2)可编程递归高斯滤波器;(3)时空时域微分器;(4)局部极值提取器。电子快门被施加到有源像素传感器阵列上,以便根据全局照明来适应曝光时间。片上直方图均衡器将图像扩展到所有后续处理算子的恒定最佳范围内,并提供了稳定且不可预测的模拟处理精度。还没有使用双多晶硅和双金属以标准的0.8-μmCMOS工艺设计和制造原型芯片,其像素间距为20μm,尺寸为7×7 mm2。线路处理时间与电视线路扫描周期兼容。最坏情况下的功耗在5 V时为40nmA

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