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Inductively Coupled Plasma Chemical Vapor Deposition for Silicon-Based Technology Compatible with Low-Temperature (≤220 ℃) Flexible Substrates

机译:适用于低温(≤220℃)柔性基板的硅基技术的电感耦合等离子体化学气相沉积

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Herein, an inductively coupled plasma chemical vapor deposition (CVD) (ICP-CVD) technique is adopted for deposition of silicon dioxide and silicon thin films to fabricate metal–oxide–semiconductor (MOS) capacitors and thin film transistors (TFTs). Prior to the fabrication and characterization of the TFTs, C–V measurements and breakdown tests are conducted on MOS capacitors based on silicon dioxide deposited under temperatures as low as 20 ℃. The breakdown field of 9 MV cm~(-1) is validated afterward, which implies the good electrical insulating property for acting as a gate insulator and the feasibility of the TFTs. After going through forming gas and thermal annealing with the highest temperature of 220 ℃, the TFTs yield good gate insulating properties, a threshold voltage of 3.7 V, an on/off ratio of 6.4×102, field effect mobility of 1.2 cm2 (V s)~(-1), and a subthreshold slope of 3.9 V dec~(-1). They show promising electrical properties under such a low-temperature fabrication process using ICP-CVD technique compatible for silicon electronics using low-cost flexible substrates.
机译:本文中,采用电感耦合等离子体化学气相沉积(ICP-CVD)技术沉积二氧化硅和硅薄膜,以制造金属氧化物半导体(MOS)电容器和薄膜晶体管(TFT)。在制造和表征TFT之前,先在低至20℃的温度下沉积基于二氧化硅的MOS电容器上进行C–V测量和击穿测试。随后对9 MV cm〜(-1)的击穿场进行了验证,这暗示了用作栅极绝缘体的良好电绝缘性能以及TFT的可行性。经过最高温度为220℃的气体形成和热退火之后,TFT具有良好的栅极绝缘性能,阈值电压为3.7 V,开/关比为6.4×102,场效应迁移率为1.2 cm2(V s )〜(-1),以及3.9 V dec〜(-1)的亚阈值斜率。它们在使用ICP-CVD技术的低温制造工艺下,与使用低成本柔性基板的硅电子设备兼容,显示出令人鼓舞的电性能。

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