Fault-Tolerant Linear Systolic Arrays for Matrix-Vector Multiplication

摘要

In this paper we design a unidirectional (ULSA) and bidirectional (BLSA) linear systolic arrays for fault-tolerant matrix-vector multiplication. We first derive a systolic algorithm which is suitable for ULSA synthesis. Then we modify this algorithm in order to obtain ULSA with optimal number of processing elements. Finally, redundancies are introduced at computational level by deriving three equivalent algorithms but with disjoint index spaces. The obtained algorithm is then used to design space-optimal fault-tolerant ULSA. Fault-tolerance is achieved by triplicated computation and majority voting. Then we briefly describe the steps for fault tolerant BLSA synthesis By the proposed scheme single transient errors can be tolerated.