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首页> 外文期刊>Microelectronics & Reliability >Electron fluence driven, Cu catalyzed, interface breakdown mechanism for BEOL low-k time dependent dielectric breakdown
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Electron fluence driven, Cu catalyzed, interface breakdown mechanism for BEOL low-k time dependent dielectric breakdown

机译:电子注量驱动,Cu催化的界面击穿机制,用于BEOL低k时间依赖性介电击穿

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摘要

During technology development, the study of low-k time dependent dielectric breakdown (TDDB) is important for assuring robust chip reliability. It has been proposed that the fundamentals of low-k TDDB are closely correlated with the leakage conduction mechanism of low-k dielectrics. In addition, low-k breakdown could also be catalyzed by Cu migration occurring mostly at the interface between capping layer and low-k dielectrics. In this paper, we first discuss several important experimental results including leakage modulation by changing the capping layer without changing the electric field, TDDB modulation by Cu-free and liner-free interconnect builds, 3D on-flight stress-induced leakage current (SILC) measurement, and triangular voltage sweep (TVS) versus TDDB to confirm the proposed electron fluence driven, Cu catalyzed interface low-k breakdown model. Then we review several other low-k TDDB models that consider only intrinsic low-k breakdown, especially the impact damage model. Experimental attempts on validation of various dielectric reliability models are discussed. Finally, we propose that low-k breakdown seems to be controlled by a complicated competing breakdown process from both intrinsic electron fluence and extrinsic Cu migration during bias and temperature stress. It is hypothesized that the amount of Cu migration during TDDB stress strongly depends on process integration. The different roles of Cu in low-fc breakdown could take different dominating effects at different voltages and temperatures. A great care must be taken in evaluating low-k dielectric TDDB as its ultimate breakdown kinetics could be strongly dependent on interconnect space, process, material, stress field, and stress temperature.
机译:在技​​术开发期间,对低k时间相关的介电击穿(TDDB)的研究对于确保强大的芯片可靠性至关重要。已经提出,低k TDDB的基本原理与低k电介质的泄漏传导机制密切相关。此外,低k击穿还可以通过主要发生在覆盖层和低k电介质之间的界面处的Cu迁移来催化。在本文中,我们首先讨论几个重要的实验结果,包括通过在不改变电场的情况下改变覆盖层来进行泄漏调制,通过无铜和无衬垫互连构建进行的TDDB调制,3D飞行应力引起的泄漏电流(SILC)测量,以及三角电压扫描(TVS)与TDDB的关系,以确认拟议的电子注量驱动,Cu催化的界面低k击穿模型。然后,我们回顾其他仅考虑固有的低k击穿的低k TDDB模型,尤其是冲击破坏模型。讨论了各种介电可靠性模型验证的实验尝试。最后,我们提出低k击穿似乎由一个复杂的竞争性击穿过程控制,该过程由偏压和温度应力下的本征电子注量和非本征Cu迁移共同控制。假设在TDDB应力下Cu的迁移量在很大程度上取决于工艺集成。 Cu在低fc击穿中的不同作用可能在不同的电压和温度下产生不同的主导作用。在评估低k介电TDDB时,必须格外小心,因为其最终击穿动力学可能在很大程度上取决于互连空间,工艺,材料,应力场和应力温度。

著录项

  • 来源
    《Microelectronics & Reliability》 |2014年第3期|529-540|共12页
  • 作者

    Fen Chen; Michael A. Shinosky;

  • 作者单位

    IBM Systems and Technology Group, Essex Junction, VT 05452, United States;

    IBM Systems and Technology Group, Essex Junction, VT 05452, United States;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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