Processing of silicon nanostructures by Ga~+ resistless lithography and reactive ion etching

摘要

Ga~+ resistless lithography and subsequent reactive ion etching (RIE) with SF_6 and C_4F_8 as process gases have been applied to fabricate silicon nanostructures with main emphasis on arrays of pillar type structures usable as nanoelectrodes. The strongly reduced etching rate of silicon areas implanted with Ga by focused ion beam (FIB) irradiation compared to unaffected silicon is investigated in dependence on the implanted dose and compared to literature. A certain dose range is found to result in an optimum masking effect whilst obtaining very smooth surfaces after RIE. As is demonstrated surfaces implanted with lower doses exhibit high roughnesses after RIE. Thus, patterning of 3D structures due to greyscale Ga~+ resistless lithography seems questionable. Depending on the RIE process parameters, however, for a given FIB mask pattern the lateral dimension of the final nanostructures can be varied in a wide range enabling very small pillar diameters or line widths due to underetching. Such structures exhibit aspect ratios well above 10 and lateral dimensions of slightly below 20 nm as demonstrated within this work. First results for the removal of the Ga implanted masking layer are presented, too. Finally, the potential and performance of Ga~+ resistless lithography compared to the fabrication of nanoelectrode structures by direct FIB milling is critically discussed.