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A Clustering Analysis Model for Golden Die Extractions Based on Wafer Acceptance Test at Semiconductor R&D Stage

机译:半导体研发阶段基于晶圆接受测试的金模提取聚类分析模型

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摘要

During the research and development (R&D) stage of semiconductor fabrication, the R&D engineers make a lot of effort to identify golden dice that meet simulated performance of circuit design. With feedback from wafer acceptance test (WAT) data of the golden dice, the efficiency of process window analysis can be further improved. However, it is difficult for current practices to select golden dice due to limited time and cost concerns. In this research, an analytical model is proposed to analyze WAT data during the R&D stage of semiconductor fabrication to assist R&D engineers in resolving these critical issues. WAT data are collected and utilized to classify dice on a wafer and similar golden dice are then identified based on pre-defined golden dice. Similar golden dice can provide much more important feedback from WAT data, and the efficiency of process window analysis can then be improved. Real WAT data at the R&D stage during semiconductor fabrication were collected from a famous semiconductor manufacturing company and were experimented through the presented methodology. Experimental results show that the presented model can successfully extract representative similar golden dice within clusters. With advice from R&D engineers, the representative similar golden dice extracted from this work are sufficient for subsequent process window analysis.
机译:在半导体制造的研发(R&D)阶段,研发工程师付出了很多努力来确定符合电路设计模拟性能的金色骰子。利用黄金骰子的晶圆验收测试(WAT)数据的反馈,可以进一步提高工艺窗口分析的效率。然而,由于有限的时间和成本问题,当前的实践难以选择黄金骰子。在这项研究中,提出了一种分析模型来分析半导体制造研发阶段的WAT数据,以帮助研发工程师解决这些关键问题。收集WAT数据并将其用于对晶片上的骰子进行分类,然后基于预定义的金色骰子来识别类似的金色骰子。类似的金骰子可以提供来自WAT数据的更重要的反馈,然后可以提高过程窗口分析的效率。半导体制造过程中研发阶段的实际WAT数据是从一家著名的半导体制造公司收集的,并通过提出的方法进行了实验。实验结果表明,所提出的模型可以成功地提取出簇内具有代表性的相似的金色骰子。在研发工程师的建议下,从这项工作中提取出的具有代表性的相似金色骰子足以用于后续的过程窗口分析。

著录项

  • 来源
    《Journal of testing and evaluation》 |2011年第4期|p.522-528|共7页
  • 作者单位

    Dept. of Information Management, Yuanpei Univ. of Technology, Hsinchu County, 30015 Taiwan;

    Dept. of Industrial Engineering and Engineering Management, National Tsing Hua Univ., Hsinchu County, 30015 Taiwan;

    Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu County,30078 Taiwan;

    Dept. of Computer Science, National Tsing Hua Univ., Hsinchu County,30013 Taiwan;

    Dept. of Industrial Engineering and Engineering Management, National Tsing Hua Univ., Hsinchu County, 30015 Taiwan;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    golden die; wafer acceptance test; semiconductor; principal component analysis; self-organizing map;

    机译:金死晶圆验收测试;半导体;主成分分析自组织图;

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