Reconfigurable Interpolation Architecture for Multistandard Video Decoding

著录项

• 来源
  《Journal of VLSI signal processing systems for signal, image, and video technology》 |2016年第2期|251-264|共14页
• 作者

  Lee Gwo Giun; Tai Tzu-Chiang; Yang Wei-Chiao; Chen Chun-Fu; Huang Chun-Hsi;

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• 作者单位

  Natl Cheng Kung Univ, Dept Elect Engn, 1 Univ Rd, Tainan 70101, Taiwan;

  Providence Univ, Dept Comp Sci & Informat Engn, Taichung, Taiwan;

  Natl Cheng Kung Univ, Dept Elect Engn, 1 Univ Rd, Tainan 70101, Taiwan;

  Natl Cheng Kung Univ, Dept Elect Engn, 1 Univ Rd, Tainan 70101, Taiwan;

  Natl Cheng Kung Univ, Dept Elect Engn, 1 Univ Rd, Tainan 70101, Taiwan;

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• 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);
• 原文格式 PDF
• 正文语种 eng
• 中图分类
• 关键词

  Reconfigurable architecture; Subpixel interpolation; Multiple video standards; Video decoding;

  机译：可重构架构;亚像素插值;多种视频标准;视频解码;