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An Efficient and High-Speed Implementation of QRD-MGS Algorithm for STAP Application Based on Floating Point FPGAs

机译:基于浮点FPGA的STAP应用QRD-MGS算法的高速实现

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Space-Time Adaptive Processing (STAP) can harness the efficacy of interference and clutter significantly. Calculations of the STAP weights involve solving linear equations which require very intensive computations. In this paper, the QR decomposition (QRD) using the modified gram-schmidt (MGS) algorithm is parameterized with vector size to create a trade-off between the hardware resources utilization and computation time. To achieve an efficient floating point structure, the proposed architecture of QRD-MGS algorithm is simulated and implemented in two modes: single-vector and multi-vector. Results show that the multi-vector method can lead to a high-performance design with higher operating frequency, lower power consumption, and less resource utilization than the single-vector method. For example, Modelism simulations show that the decomposition of a 12 × 51 matrix with vector size of 17 takes 7.86 μs with the maximum clock frequency of 282 MHz, for implementation on the ArrialO FPGA. In real STAP applications, the matrix sizes are too large to be fit on FPGAs and the update rate of the weights are high. Therefore, this method can fit any matrix in the contemporary FPGAs with an acceptable update rate.
机译:时空自适应处理(STAP)可以显着利用干扰和杂波的功效。 STAP权重的计算涉及求解需要非常密集的计算的线性方程。在本文中,使用修改的Gram-Schmidt(MGS)算法的QR分解(QRD)是用载体大小进行参数化,以在硬件资源利用率和计算时间之间创建权衡。为了实现高效的浮点结构,以两种模式模拟和实现了QRD-MGS算法的所提出的架构:单向量和多向量。结果表明,多向量方法可导致高性能设计,操作频率较高,功耗较低,资源利用较少而不是单载方法。例如,建模主义模拟表明,12×51矩阵的分解为17尺寸为7.86μs,最大时钟频率为282 MHz,以实现在Arrialo FPGA上。在真实的STAP应用中,矩阵大小太大,不能适合FPGA,并且权重的更新率高。因此,该方法可以以可接受的更新速率在当代FPGA中符合任何矩阵。

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