机译:时间交错ADC中的全带定时不匹配技术
Univ Elect Sci & Technol China State Key Lab Elect Thin Films & Integrated Devic Room 1003 Bldg 211 4 Sect 2 North Jianshe Rd Chengdu 610054 Sichuan Peoples R China;
Univ Elect Sci & Technol China State Key Lab Elect Thin Films & Integrated Devic Room 1003 Bldg 211 4 Sect 2 North Jianshe Rd Chengdu 610054 Sichuan Peoples R China;
Univ Elect Sci & Technol China State Key Lab Elect Thin Films & Integrated Devic Room 1003 Bldg 211 4 Sect 2 North Jianshe Rd Chengdu 610054 Sichuan Peoples R China;
Univ Elect Sci & Technol China State Key Lab Elect Thin Films & Integrated Devic Room 1003 Bldg 211 4 Sect 2 North Jianshe Rd Chengdu 610054 Sichuan Peoples R China;
Univ Elect Sci & Technol China State Key Lab Elect Thin Films & Integrated Devic Room 1003 Bldg 211 4 Sect 2 North Jianshe Rd Chengdu 610054 Sichuan Peoples R China;
Timing mismatch; full-band calibration; time-interleaved; analog-to-digital converters;
机译:时间交错ADC中的全频带时序失配校准技术
机译:用于时间交错ADC的时序不匹配的通道复用数字校准技术
机译:用于时间交错ADC时序不匹配的全数字背景校准技术
机译:用于四通道时间交错ADC中时序不匹配的数字校准技术
机译:低功耗高速时间交错ADC的不匹配校准技术
机译:物联网系统中用于UWB无线通信的具有时间时序校正的时间交错SAR ADC
机译:时间交错ADC中计时失配的高效数字校准技术