Design Methodology of Ultra-Low-Power LC-VCOs for IoT Applications

摘要

A design methodology of CMOS LC voltage-controlled oscillator (VCO) is proposed in this paper. The relation between components and specifications of the LC-VCO is studied to easily identify its design trade-offs. This methodology has been applied to design ultra-low-power LC-VCOs for different frequency bands. An LC-VCO based on the current reuse technique has been realized with the proposed methodology in 0.13 mu m CMOS process. Measurements present an ultra-low power consumption of only 262 mu W drawn from 1V supply voltage. The measured frequency tuning range is about 10% between 2.179 GHz and 2.409 GHz. The post-layout simulation presents a phase noise (PN) of -114.7 dBc/Hz, while the measured PN is -102.16 dBc/Hz.