机译:基于CIPHER块的身份验证模块:硬件设计角度
Department of Electrical (&) Computer Engineering, University of Patras, Rio Campus, Patras, GR-26500, Greece;
Department of Electrical (&) Computer Engineering, University of Patras, Rio Campus, Patras, GR-26500, Greece;
Department of Electrical (&) Computer Engineering, University of Patras, Rio Campus, Patras, GR-26500, Greece;
Department of Computer Science and Biomedical Informatics, University of Central Greece, Papasiopoulou 2-4, Lamia, GR-35100, Greece;
IMEC/Holst Centre, High Tech Campus 31, Eindhoven, 5656AE, The Netherlands;
message authentication code; vlsi; cryptography;
机译:用于安全通信的轻量级分组密码的硬件设计和建模
机译:128位块密码ARIA和AES的统一硬件的设计和实现
机译:128位块密码ARIA和AES的统一硬件的设计和实现
机译:基于区域的系统设计框架,可实现基于高效分组密码的消息认证码算法
机译:一种硬件嵌入式,基于延迟的PUF引擎,设计用于加密和身份验证应用程序。
机译:用于无线传感器网络中高效广播认证的动态密码难题
机译:硬件密码模块设计