Study of deep traps in AlGaN/GaN high-electron mobility transistors by electrical characterization and simulation

摘要

The localization of deep traps in normally-off AIGaN/GaN metal-oxide-semiconductor channel high-electron mobility transistors has been established by means of capacitance and current deep level transient spectroscopies (DLTS). Electrical simulations of the total current density between the drain and source contacts, the electron density, and the equipotential line distribution helped to understand the transport mechanisms into the device and to determine the zone probed by DLTS measurements. By changing the drain-source voltage in current DLTS or the reverse bias in capacitance DLTS, we demonstrated that we can choose to probe either the region below the gate or the region between the gate and drain electrodes. We could then see that defects related to reactive ion etching induced surface damage, expected to be formed during the gate recess process, were located only under the gate contact whereas native defects were found everywhere in the GaN layer. Thanks to this method of localization, we assigned a trap with an Ec- 0.5 eV to ion etching induced damage.