Surface assessment after removing Ⅲ-Ⅴ layer on Ⅲ-Ⅴ/silicon-on-insulator wafer fabricated by plasma activated bonding

摘要

The partial removal of the Ⅲ-Ⅴ layers of a Ⅲ-Ⅴ /silicon-on-insulator hybrid wafer was investigated to realize Ⅲ-Ⅴ /Si hybrid photonic integrated circuits. Using transmission electron microscopy, we found that an amorphous layer was generated at the interface of a Ⅲ-Ⅴ /Si wafer fabricated by N_2-plasma-activated bonding. In order to remove the Ⅲ-Ⅴ layers including the amorphous layers without damage to the Si surface, several etching processes were carried out, and the surface conditions were evaluated by X-ray photoelectron spectroscopy. As a result, we demonstrated comparable propagation losses in Si wire waveguides with and without the bonding/removal processes.