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Substrate noise measurement by using noise-selective voltage comparators in analog and digital mixed-signal integrated circuits

机译:通过在模拟和数字混合信号集成电路中使用噪声选择电压比较器来测量基板噪声

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In mixed-signal integrated circuits (IC's), substrate noise produced by high-speed digital circuits passes to the on-chip analog circuits through the substrate and seriously degrades their performance. We have developed a method for measuring the substrate noise by using noise-selective chopper-type voltage comparators as noise detectors. This method can detect the wide-band substrate noise so we can analyze and further reduce its effect. A switched capacitance is selectively loaded on the output of the inverter amplifier of the comparator during the comparison period in order to reduce the noise detected at the transition from compare to auto-zero. In contrast, the noise at the transition from auto-zero to compare can be selectively detected. Waveforms of high-frequency substrate noise were reconstructed by using this on-chip-noise detector incorporating the noise-selective comparators implemented using a 0.5-/spl mu/m CMOS bulk process.
机译:在混合信号集成电路(IC)中,高速数字电路产生的基板噪声会通过基板传递到片上模拟电路,从而严重降低其性能。我们已经开发出一种通过使用噪声选择性斩波型电压比较器作为噪声检测器来测量基板噪声的方法。这种方法可以检测宽带基板噪声,因此我们可以分析并进一步降低其影响。在比较期间,开关电容有选择地加载到比较器​​的反相放大器的输出上,以减少在从比较到自动归零的过渡过程中检测到的噪声。相反,可以选择性地检测从自动归零到比较过渡的噪声。高频基片噪声的波形是通过使用该片上噪声检测器重建的,该检测器结合了使用0.5- / spl mu / m CMOS批量工艺实现的噪声选择性比较器。

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