机译:垂直NAND闪存中使用PCI(Paired Cell Interference,配对单元干扰)的多级读取方法
Inter-university Semiconductor Research Center and School of Electrical Engineering, Seoul National University San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Republic of Korea;
Inter-university Semiconductor Research Center and School of Electrical Engineering, Seoul National University San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Republic of Korea;
Inter-university Semiconductor Research Center and School of Electrical Engineering, Seoul National University San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Republic of Korea;
Inter-university Semiconductor Research Center and School of Electrical Engineering, Seoul National University San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Republic of Korea;
Inter-university Semiconductor Research Center and School of Electrical Engineering, Seoul National University San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Republic of Korea;
Inter-university Semiconductor Research Center and School of Electrical Engineering, Seoul National University San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Republic of Korea;
Inter-university Semiconductor Research Center and School of Electrical Engineering, Seoul National University San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Republic of Korea;
Inter-university Semiconductor Research Center and School of Electrical Engineering, Seoul National University San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Republic of Korea;
Inter-university Semiconductor Research Center and School of Electrical Engineering, Seoul National University San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Republic of Korea;
Inter-university Semiconductor Research Center and School of Electrical Engineering, Seoul National University San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Republic of Korea;
Inter-university Semiconductor Research Center and School of Electrical Engineering, Seoul National University San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Republic of Korea;
NAND flash memory; 3-D array; PCI(paired cell interference);
机译:垂直NAND闪存中使用PCI(配对单元干扰)的多级读取方法
机译:垂直NAND闪存中使用PCI(配对单元干扰)的多级读取方法
机译:垂直NAND闪存中使用PCK配对单元干扰的多级读取方法
机译:基于最小二乘的单元间干扰消除技术
机译:低功耗,高度可扩展的垂直闪存单元和MOSFET
机译:用于减少Z干扰的垂直NAND闪存的新型程序方案
机译:用于减少Z干扰的垂直NAND闪存的新型程序方案