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Circuit and method of reading multi-level NAND flash memory cell
Circuit and method of reading multi-level NAND flash memory cell
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机译:读取多级NAND闪存单元的电路和方法
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摘要
The disclosed is a method of reading a multi-level NAND flash memory cell and a circuit for the same. The read circuit for the NAND flash memory device includes a NAND flash memory cell having multi-level information, a first page buffer for storing an upper-bit, a second page buffer for storing a lower bit, and pass transistor for changing information of the second page buffer according to a variation of the first page buffer. In accordance with the present invention, "00" or "01" information is read out by applying a first voltage to a word line of the cell. "00", "01", or "11" information is read out by applying a second voltage to the word line. A latch pass control signal is applied to a pass transistor. Thus, it is possible to read out "00", "01", "11", or "10" information.
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