Characterization and Analysis of an Innovative Gate Driver and Power Supplies Architecture for HF Power Devices With High dv/dt

摘要

This paper presents a specific architecture for a low-side/high-side gate driver implementation for power devices running at high switching frequencies and under very high switching speeds. An electromagnetic interference (EMI) optimization is done by modifying the parasitic capacitance of the propagation paths between the power and the control sides, thanks to a specific design of the circuit. Moreover, to reduce the parasitic inductances and to minimize the antenna phenomenon, the paper studies which elements of the drivers' circuitry must be brought as close as possible to the power parts. This is important when the ambient temperature of the power device becomes critical, for instance, in automotive and aeronautic applications. Simulations and experiments validate the advantages of the proposed architecture on the conducted EMI problem.