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Characterization of Neutron- and Alpha-Particle-Induced Transients Leading to Soft Errors in 90-nm CMOS Technology

机译:90nm CMOS技术中导致软错误的中子和α粒子诱导的瞬态的表征

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Combinational logic soft errors are a major environment-related reliability issue in advanced CMOS processes. The key to determining logic soft error rates (SERs) is detailed knowledge of neutron- and alpha-particle-induced single-event transient (SET) pulsewidths, but these pulsewidths are difficult to measure directly. Experimental results obtained using a novel test chip fabricated in a 90-nm CMOS technology indicate that the SET widths induced by these particles are similar to those of legitimate logic signals. The logic failure-in-time (FIT) rates, computed based on experimental SET cross sections, correspond with previous simulation-based projections of FIT rates and indicate that logic SER may be an issue for some terrestrial applications. Monte Carlo-based simulations are used to verify experimental cross sections and to project scaling of neutron and alpha SET cross sections. These results indicate that alpha-particle-induced SET cross sections scale more rapidly than neutron SET cross sections.
机译:组合逻辑软错误是高级CMOS工艺中与环境相关的主要可靠性问题。确定逻辑软错误率(SER)的关键是对中子和α粒子诱发的单事件瞬变(SET)脉冲宽度的详细了解,但是这些脉冲宽度很难直接测量。使用以90纳米CMOS技术制造的新型测试芯片获得的实验结果表明,由这些粒子引起的SET宽度与合法逻辑信号的宽度相似。基于实验SET横截面计算的逻辑及时故障率(FIT)与先前基于仿真的FIT率预测相对应,并表明逻辑SER对于某些地面应用可能是个问题。基于蒙特卡洛的模拟用于验证实验截面以及投影中子和αSET截面的比例。这些结果表明,α粒子诱导的SET截面比中子SET截面更快地缩放。

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