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Simulation Study of Large-Scale Charge Sharing Mitigation Using Seamless Guard Band

机译:无缝保护带的大规模电荷共享缓解模拟研究

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摘要

In this paper, a novel seamless guard band (SGB) technique for charge sharing mitigation is studied using 3-D TCAD numerical simulations. The simulations results in 65-nm twin-well bulk CMOS technology indicate that the SGB technique can not only mitigate the single-event transient pulsewidth greatly but also mitigate the charge sharing between logical nodes or logical cells significantly. The simulation results also indicate that the SGB technique is superior to the conventional guard band (GB) technique, for it is more beneficial for parasitic bipolar effect mitigation. Using SGB technique, the single-event double-transient (SEDT) generation is mitigated completely under low LET particle (LET ≤40 MeV⋅cm2/mg) radiation, and the SEDT pulsewidth is mitigated > 50% even with the LET of 80 MeV⋅cm2/mg, which is > 25% from GB technique. Finally, the SGB technique can be applied to the construction of a radiation-hardened standard cell library conveniently, and its area penalty is 1–1.67 ×, which is the same with that of the GB technique.
机译:在本文中,使用3-D TCAD数值模拟研究了一种新颖的无缝保护带(SGB)技术,用于缓解电荷共享。 65nm双阱体CMOS技术的仿真结果表明,SGB技术不仅可以大大减轻单事件瞬态脉冲宽度,而且可以大大减轻逻辑节点或逻辑单元之间的电荷共享。仿真结果还表明,SGB技术优于传统的保护带(GB)技术,因为它对减轻寄生双极效应更有利。使用SGB技术,可以在低LET粒子(LET≤40 MeV·cm2 / mg)辐射下完全缓解单事件双瞬态(SEDT)的产生,即使LET为80 MeV,SEDT脉宽也可以缓解> 50% ⋅cm2/ mg,根据GB技术,其> 25%。最后,SGB技术可以方便地应用于辐射硬化标准细胞库的构建,其面积损失为1–1.67×,与GB技术相同。

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  • 作者单位

    National Laboratory for Parallel and Distributed Processing, College of Computer, National University of Defense Technology, Changsha, China;

    National Laboratory for Parallel and Distributed Processing, College of Computer, National University of Defense Technology, Changsha, China;

    National Laboratory for Parallel and Distributed Processing, College of Computer, National University of Defense Technology, Changsha, China;

    National Laboratory for Parallel and Distributed Processing, College of Computer, National University of Defense Technology, Changsha, China;

    National Laboratory for Parallel and Distributed Processing, College of Computer, National University of Defense Technology, Changsha, China;

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  • 正文语种 eng
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  • 关键词

    Layout; MOSFET; Inverters; Transient analysis; Sensitivity; Modulation; Semiconductor process modeling;

    机译:布局;MOSFET;逆变器;瞬态分析;灵敏度;调制;半导体工艺建模;

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