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Architecture Design of an Area Efficient High Speed Crypto Processor for 4G LTE

机译:用于4G LTE的高效区域高速加密处理器的架构设计

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The whole security architecture of LTE/SAE (Long Term Evolution/System Architecture Evolution) is being consisted of four main hardware-oriented cryptographic algorithms: KASUMI block ciphers, SNOW-3G stream cipher, the MILENAGE algorithm set, and the 4G development of ZUC algorithm. This paper presents an FPGA deployment of a universal security architecture crypto processor for 4G LTE, consisting of both four ciphers enabling each one on demand, which is based on two novel design principles. One is a more intelligent implementation of the four algorithm's substitution boxes (S-boxes) based on a common intersection assumption of their contents. The second includes the use of a common data path hardware block deployed along the four cipher's architectural design. This universal security architecture crypto processor proves to reduce the area space at least 1.5 times, and also provides almost double throughput compared with the state-of-the-art realizations of the individual ciphers, something which is a high necessity when producing components for the demanding post-4G cellular market.
机译:LTE / SAE(长期演进/系统架构演进)的整个安全架构由四种主要的面向硬件的密码算法组成:KASUMI分组密码,SNOW-3G流密码,MILENAGE算法集以及ZUC的4G开发算法。本文介绍了一种适用于4G LTE的通用安全性架构加密处理器的FPGA部署,该加密器基于两种新颖的设计原理,由两种使每个密钥按需启用的密码组成。一种是基于其内容的公共交集假设,更智能地实现四个算法的替换框(S-box)。第二个步骤包括使用沿着四个密码的体系结构设计部署的通用数据路径硬件模块。与单个密码的最新实现相比,这种通用安全体系结构的加密处理器被证明可以减少至少1.5倍的区域空间,并且还提供了几乎两倍的吞吐量,这在为加密算法生产组件时非常必要苛刻的4G后蜂窝市场。

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