A transformational approach to synthesizing combinational circuits

摘要

VAR, a transformational approach for obtaining multilevel logic synthesis results, is described. Suppressed variable permutation and complementation (SVPC) transformations which are powerful and can be economically realized are introduced. Each SVPC transformation can be viewed as an identity mapping on the n-cube, except on an (n-r)-subcube (defined by r fixed coordinates), where it behaves like a variable permutation and complementation (VPC) transformation on n-r variables (the free variables). VAR is based on transforming the input functions to predefined goal functions by SVPC transformations. A transformation tree is obtained, and the transformations on the tree are collapsed and further simplified to obtain an economical circuit. This approach is illustrated by considering the sum function of the full adder.