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Binary-Weighted Digital-to-Analog Converter Design Using Floating-Gate Voltage References

机译:使用浮栅基准电压源的二进制加权数模转换器设计

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An implementation of a compact and programmable 10-bits floating-gate digital-to-analog converter (FGDAC) is described. In this implementation, nonvolatile floating-gate voltage references (epots) are employed together with unity-size capacitors to obtain the binary-weighted scale factors. The FGDAC, fabricated in a 0.5- mum CMOS process, occupies 0.208 mm2 of die area. The stored epot voltages drift 10_3% over the period of ten years at 25 degC and exhibit temperature coefficients of less than 37 ppm/degC. With the proposed design, INL and DNL values less than plusmn0.5LSB (LSB = 3 mV) and SFDR around 63 dB are obtained.
机译:描述了一种紧凑且可编程的10位浮栅数模转换器(FGDAC)的实现。在此实现中,非易失性浮栅参考电压(epot)与单位大小的电容器一起使用以获得二进制加权比例因子。采用0.5微米CMOS工艺制造的FGDAC占据了0.208 mm2的管芯面积。在25摄氏度下,存储的epot电压在十年内漂移10_3%,并且温度系数小于37 ppm /摄氏度。通过提出的设计,可以获得小于plusmn0.5LSB(LSB = 3 mV)的INL和DNL值以及大约63 dB的SFDR。

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