Neural Synaptic Weighting With a Pulse-Based Memristor Circuit

摘要

A pulse-based programmable memristor circuit for implementing synaptic weights for artificial neural networks is proposed. In the memristor weighting circuit, both positive and negative multiplications are performed via a charge-dependent Ohm's law ($ v = M(q) times i $). The circuit is composed of five memristors with bridge-like connections and operates like an artificial synapse with pulse-based processing and adjustability. The sign switching pulses, weight setting pulses and synaptic processing pulses are applied through a shared input terminal. Simulations are done with both linear ${hbox{TiO}} _{2}$ memristor and window-based nonlinear memristor models.