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Suppression of Quantization-Induced Convergence Error in Pipelined ADCs With Harmonic Distortion Correction

机译:具有谐波失真校正的流水线ADC中量化引起的收敛误差的抑制

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Harmonic Distortion Correction (HDC) is one of two published digital background calibration techniques that compensate for residue amplifier nonlinearity in pipelined ADCs. The techniques make it possible to reduce the gains and bandwidths, and therefore the power dissipations, of the op-amps that make up the residue amplifiers without sacrificing pipelined ADC accuracy. Unfortunately, the previously published techniques fail to operate properly when they measure residue amplifier distortion for certain pipelined ADC input signals, most notably input signals with small peak-to-peak variations about certain constant values. This paper identifies the cause of the problem, quantifies its effects, and provides an all-digital solution applicable to the HDC technique.
机译:谐波失真校正(HDC)是两种已发布的数字背景校准技术之一,该技术可补偿流水线ADC中的残留放大器非线性。该技术可以在不牺牲流水线ADC精度的情况下,降低构成余数放大器的运算放大器的增益和带宽,从而降低其功耗。不幸的是,先前发布的技术在测量某些流水线ADC输入信号的残余放大器失真时,无法正常工作,最显着的是输入信号在某些恒定值上具有很小的峰峰值变化。本文确定了问题的原因,量化了其影响,并提供了适用于HDC技术的全数字解决方案。

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