机译:高速时交错子测距SAR ADC的最优码传输技术设计
Univ Macau, State Key Lab Analog & Mixed Signal VLSI, Fac Sci & Technol, Dept Elect & Comp Engn, Macau 999078, Peoples R China;
Univ Macau, State Key Lab Analog & Mixed Signal VLSI, Fac Sci & Technol, Dept Elect & Comp Engn, Macau 999078, Peoples R China;
Univ Macau, State Key Lab Analog & Mixed Signal VLSI, Fac Sci & Technol, Dept Elect & Comp Engn, Macau 999078, Peoples R China;
Univ Pavia, Dept Elect, I-27100 Pavia, Italy;
Univ Macau, State Key Lab Analog & Mixed Signal VLSI, Fac Sci & Technol, Dept Elect & Comp Engn, Macau 999078, Peoples R China;
Univ Macau, State Key Lab Analog & Mixed Signal VLSI, Fac Sci & Technol, Dept Elect & Comp Engn, Macau 999078, Peoples R China;
SAR ADC; time-interleaved scheme; two-step SAR conversion; reference interference;
机译:高速开关电容时间交错ADC的全局无源采样技术
机译:时间交错ADC校准算法在高速通信系统中的设计与实验评估
机译:具有背景校准功能的时间交错SAR ADC设计
机译:利用非二进制搜索算法和冗余度的高速SAR ADC设计技术
机译:高速时间交错SAR ADC的校准技术
机译:物联网系统中用于UWB无线通信的具有时间时序校正的时间交错SAR ADC
机译:一种11位亚测距saR aDC,输入信号范围为两倍电源电压