首页> 外文期刊>IEEE Transactions on Electron Devices >An analog/digital BCDMOS technology with dielectric isolation-devices and processes
【24h】

An analog/digital BCDMOS technology with dielectric isolation-devices and processes

机译:具有介电隔离装置和工艺的模拟/数字BCDMOS技术

获取原文
获取原文并翻译 | 示例

摘要

A dielectrically isolated bipolar-CMOS-DMOS (BCDMOS) integrated-circuit technology that has been successfully developed for high-voltage applications (150-500 V) is reported. This technology integrates bipolar, CMOS, DMOS, p-n-p-n, JFET, and DGDMOS (dual-gate DMOS) devices on a single chip. The core BCDMOS process is chosen to be an optimized poly-gate n-channel DMOS process; additional levels and their relative sequences were chosen on the basis of their effects on the performance of the various kinds of devices in the chip and the trade-offs among those performances. The characteristics of the major devices in solid-state switches for telecommunication applications are demonstrated.
机译:据报道,已经成功地为高压应用(150-500 V)开发了一种介电隔离的双极CMOS-DMOS(BCDMOS)集成电路技术。该技术在单个芯片上集成了双极,CMOS,DMOS,p-n-p-n,JFET和DGDMOS(双栅极DMOS)器件。选择核心BCDMOS工艺为优化的多栅n沟道DMOS工艺;根据它们对芯片中各种器件性能的影响以及这些性能之间的权衡取舍,选择其他级别及其相对顺序。演示了用于电信应用的固态交换机中主要设备的特性。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号