...
首页> 外文期刊>IEEE Transactions on Electron Devices >Current drive enhancement by using high-permittivity gate insulator in SOI MOSFET's and its limitation
【24h】

Current drive enhancement by using high-permittivity gate insulator in SOI MOSFET's and its limitation

机译:在SOI MOSFET中使用高介电常数栅极绝缘体来增强电流驱动能力及其局限性

获取原文
获取原文并翻译 | 示例

摘要

Speed enhancement effects by using a high-permittivity gate insulator in SOI MOSFETs and its limitation were investigated by a two-dimensional device simulator and circuit simulator. The SOI structure is suitable to have excellent current drive by using a high-permittivity gate insulator. Although the gate capacitance increases as a function of its dielectric constant, the current drive does not increase proportionally due to the inversion capacitance. According to the simulation results of the delay time, when the pulse waveforms driven by a CMOS inverter are propagated through 1 mm-long interconnects, the delay time significantly reduces at a dielectric constant value of around 25 (Ta/sub 2/O/sub 5/). Thus, it is worthwhile using Ta/sub 2/O/sub 5/ for gate insulator to achieve high-speed operation. Furthermore, the reduction of source parasitic series resistance is a key issue to realize the highest current drive by using a high-permittivity gate insulator in SOI MOSFET.
机译:通过二维器件仿真器和电路仿真器,研究了在SOI MOSFET中使用高介电常数栅绝缘体提高速度的效果及其局限性。通过使用高介电常数栅绝缘体,SOI结构适合具有出色的电流驱动能力。尽管栅极电容是其介电常数的函数,但由于反相电容,电流驱动不会按比例增加。根据延迟时间的模拟结果,当CMOS反相器驱动的脉冲波形通过1毫米长的互连传播时,在大约25(Ta / sub 2 / O / sub 5 /)。因此,值得将Ta / sub 2 / O / sub 5 /用于栅极绝缘体以实现高速操作。此外,通过在SOI MOSFET中使用高介电常数栅极绝缘体来实现最大电流驱动,减小源极寄生串联电阻是关键问题。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号