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Formation of cobalt silicided shallow junction using implant into/through silicide technology and low temperature furnace annealing

机译:使用注入硅化技术/通过硅化技术和低温炉退火形成硅化钴浅结

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This work investigates the shallow CoSi/sub 2/ contacted junctions formed by BF/sub 2//sup +/ and As/sup +/ implantation, respectively, into/through cobalt silicide followed by low temperature furnace annealing. For p/sup + junctions fabricated by 20 keV BF/sub 2//sup +/ implantation to a dose of 5/spl times/10/sup 15/ cm/sup -2/, diodes with a leakage current density less than 2 nA/cm/sup 2/ at 5 V reverse bias can be achieved by a 700/spl deg/C/60 min annealing. This diode has a junction depth less than 0.08 /spl mu/m measured from the original silicon surface. For n/sup +/p junctions fabricated by 40 keV As/sup +/ implantation to a dose of 5/spl times/10/sup 15/ cm/sup -2/, diodes with a leakage current density less than 5 nA/cm/sup 2/ at 5 V reverse bias can be achieved by a 700/spl deg/C/90 min annealing; the junction depth is about 0.1 /spl mu/m measured from the original silicon surface. Since the As/sup +/ implanted silicide film exhibited degraded characteristics, an additional fluorine implantation was conducted to improve the stability of the thin silicide film. The fluorine implantation can improve the silicide/silicon interface morphology, but it also introduces extra defects. Thus, one should determine a tradeoff between junction characteristics, silicide film resistivity, and annealing temperature.
机译:这项工作研究了分别由BF / sub 2 // sup + /和As / sup + /注入硅化钴/硅化钴,然后进行低温炉退火而形成的浅CoSi / sub 2 /接触结。对于通过20 keV BF / sub 2 // sup + /注入至5 / spl次/ 10 / sup 15 / cm / sup -2 /的剂量制造的p / sup + / n结,二极管的漏电流密度较小通过在700 / spl deg / C / 60 min的退火条件下,在5 V时反向偏压可达到2 nA / cm / sup 2 /。从原始硅表面测量,该二极管的结深度小于0.08 / spl mu / m。对于通过40 keV As / sup + /注入5 / spl次/ 10 / sup 15 / cm / sup -2 /剂量制作的n / sup + / p结,二极管的漏电流密度小于5 nA /可以通过700 / spl deg / C / 90分钟的退火来实现5V时的cm / sup 2 /反向偏置;从原始硅表面测得的结深度约为0.1 / spl mu / m。由于As / sup + /注入的硅化物膜表现出劣化的特性,因此进行了另外的氟注入以改善硅化物薄膜的稳定性。氟注入可以改善硅化物/硅界面的形态,但同时也会带来额外的缺陷。因此,应该确定结点特性,硅化物膜电阻率和退火温度之间的权衡。

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