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Threshold-Voltage Modeling of Body-Tied FinFETs (Bulk FinFETs)

机译:体贴式FinFET(体FinFET)的阈值电压建模

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The threshold voltages Vth of the body-tied double/triple-gate MOSFETs (bulk FinFETs) implemented on bulk silicon (Si) wafers were modeled systematically and compared with data obtained from 3-D device simulation. The threshold-voltage behaviors of the bulk FinFETs were modeled, for the first time, based on charge sharing. For the simplified Vth model, we considered not only short-channel effect (SCE) and narrow-width effect but also 3-D charge sharing at the corner. Only one fitting parameter is introduced to reflect the SCE in the fin body. The model predicted the Vth behavior with fin body thickness, body doping concentration, gate height, gate length, and corner shape of the fin body well. Our compact model makes an accurate prediction of Vth and shows good agreement with 3-D simulation data
机译:系统地对在体硅(Si)晶圆上实现的双体/三栅极MOSFET(体FinFET)的阈值电压Vth进行了系统建模,并与从3-D器件仿真获得的数据进行了比较。首次基于电荷共享对体FinFET的阈值电压行为进行了建模。对于简化的Vth模型,我们不仅考虑了短通道效应(SCE)和窄宽度效应,还考虑了拐角处的3-D电荷共享。仅引入一个拟合参数以反映鳍片主体中的SCE。该模型通过鳍体厚度,体掺杂浓度,栅极高度,栅极长度和鳍体角形状预测了Vth行为。我们的紧凑模型可以准确预测Vth,并与3-D仿真数据显示出良好的一致性

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