Performance of Localized-SOI MOS Devices on (110) Substrates: Impact of Channel Direction

摘要

In this letter, we demonstrate the optimization of localized silicon-on-insulator and the functionality of devices on (110) silicon substrates. The influence of several channel directions (i.e., 15 $^{circ}$, 30$^{circ}$ , 45$^{circ}$, and 60 $^{circ}$ away from the [001] direction) on both hole mobility and electron mobility has been investigated. Finally, the electrical characteristics of 55-nm-gate-length n-channel and p-channel metal–oxide–semiconductor transistors are presented, showing a good subthreshold behavior and confirming the interest of (110) ultrathin body/box devices for low-power applications.