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Ultralow Specific On-Resistance High-Voltage SOI Lateral MOSFET

机译:超低比导通电阻高压SOI横向MOSFET

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摘要

An ultralow specific on-resistance ($R_{{rm on, sp}}$) integrable silicon-on-insulator (SOI) power lateral MOSFET is proposed. The MOSFET features double trenches: an oxide trench in the drift region and a trench gate extended to the buried oxide (BOX) (SOI DT MOSFET). First, the oxide trench causes multiple–directional depletion, which leads to electric field reshaping and an enhanced reduced surface field effect in the SOI layer. The electric field distributions in the SOI and BOX are thus improved. The oxide trench also increases the electric field strength in the $x$ -direction due to the lower permittivity of oxide than that of Si. Both increase breakdown voltage (BV). Second, the trench makes the drift region folded in the $y$ -direction, resulting in reduced cell pitch and $R_{{rm on, sp}}$ . Third, the trench gate extended to the BOX further reduces $R_{{rm on, sp}}$ by widening the vertical conduction area. The BV of the DT MOSFET increases from 91 V of the conventional SOI LDMOS to 233 V at a half-cell pitch of 6.5 $muhbox{m}$ , and the $R_{{rm on, sp}}$ decreases from 5.1 to 3.3 $hbox{m}Omegacdothbox{cm}^{2}$.
机译:提出了一种超低比导通电阻($ R _ {{rm on,sp}} $)集成绝缘体上硅(SOI)功率横向MOSFET。 MOSFET具有双沟槽:漂移区中的氧化物沟槽和延伸至掩埋氧化物(BOX)的沟槽栅(SOI DT MOSFET)。首先,氧化物沟槽会引起多向耗尽,从而导致电场整形并增强SOI层中减小的表面场效应。 SOI和BOX中的电场分布因此得到改善。由于氧化物的介电常数比Si的介电常数低,因此氧化物沟槽还增加了在$ x $方向上的电场强度。两者都会增加击穿电压(BV)。其次,沟槽使漂移区沿$ y $方向折叠,从而导致单元间距减小和$ R _ {{rm on,sp}} $。第三,延伸至BOX的沟槽栅极通过加宽垂直传导面积进一步降低了R _ {{rm on,sp}} $。 DT MOSFET的BV从常规SOI LDMOS的91 V增加到233 V,半单元间距为6.5 $ muhbox {m} $,而$ R _ {{rm on,sp}} $从5.1降低至3.3 $ hbox {m} Omegacdothbox {cm} ^ {2} $。

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