The Conduction Characteristics of a 700 V Lateral Insulated-Gate Bipolar Transistor in a Junction Isolation Technology

摘要

This letter presents the conduction characteristics of a 700 V n-type lateral insulated-gate bipolar transistor with quasi-vertical diffused metal-oxide-semiconductor (QVDMOS) field effect transistor fabricated with junction isolation technology. To improve the substrate leakage, a p-type buried layer (PBL) is inserted between the n-type drift region and the n-type buried layer. Measured results show that this structure successfully reduces the substrate current and ensures high breakdown voltage. Furthermore, due to the use of the QVDMOS cathode, an additional current path enables a reduction in the forward voltage drop. This letter shows that the PBL not only improves the dc properties of the device but also yields a shorter turn-OFF time.