A THEORETICAL STUDY OF THE THRESHOLD VOLTAGE SENSITIVITY TO PROCESS VARIATION IN SYMMETRIC DOUBLE GATE MOS DEVICES

摘要

In this paper we have studied the threshold voltage sensitivity to process variation like channel length, silicon filmthickness (tSi) and gate oxide thickness (tOX) in undoped symmetric Double gate (SDG) metal oxide semiconductor fieldeffect transistors (MOSFETs) after developing an analytical model of threshold voltage (VTh). In the proposed modelwe have introduced a parameter ? to take care of Drain-induced barrier lowering (DIBL) effect and quantumconfinement effect in sub micron SDG metal oxide semiconductor (MOS) devices. To verify the validity of ourdeveloped model, we have compared the simulation results of threshold voltage model with two-dimensional MINIMOSsimulator results and found a close agreement. These analytical expressions for sensitivity are solved numerically andcompared with published results. The analytical expressions of the sensitivity strongly depend on the device parametercombinations. The study suggests that the threshold voltage sensitivity to length imposes a serious constrain on thescaling of SDG MOS devices. The VTh sensitivity to tOX is not a serious issue for longer SDG MOS devices whereas indeep sub-micron regime, its effect can not be ignored which put restriction on the choice of the gate oxide thicknessvalue.