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First-Order Performance Prediction of Cache Memory with Wafer-Level 3D Integration

机译:晶圆级3D集成的高速缓存的一阶性能预测

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摘要

DUE TO THE SPEED MISMATCH between the CPU and increasing main-memory size, on-chip memory is becoming a key determinant of microprocessor performance. On-chip L2 cache sizes of the Intel microprocessor family keep increasing; for example, (1) 256 Kbytes in the Pentium III Coppermine at 180-nm technology, (2) 512 Kbytes in the Pentium 4 Northwood at 130-nm technology, (3) 1 Mbytes in the Pentium M processor 755 at 90-nm technology, and (4) 4 Mbytes in the Conroe processor at 65-nm technology.
机译:由于CPU与主存储器之间的速度失配,片上存储器已成为决定微处理器性能的关键因素。英特尔微处理器系列的片上二级缓存大小不断增加;例如,(1)180纳米技术在Pentium III Coppermine中为256 KB,(2)130纳米技术在Pentium 4 Northwood中为512 KB,(3)90纳米技术在Pentium M处理器755中为1兆字节(4)65纳米技术的Conroe处理器中的4兆字节。

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