An Implementation of Out-Of-Order Execution System for Acceleration of Computational Fluid Dynamics on FPGAs

摘要

CFD is an important tool for designing aircraft components. FaSTAR is one of the most recent CFD program package with various solvers and automatic generation of grid data. However, FaSTAR is difficult to be executed in parallel machines because of its irregular data structure. Here, the surface integral module, one of cores of FaSTAR is implemented in an FPGA for future acceleration using a platform FLOPS-2D. However, even with hardware execution, the pipeline module suffers from frequent stalls caused by irregular and successive memory access. In order to rid of the problem, a data controller for Out-Of-Order execution was designed and implemented. With the controller, the number of stall was at most 0.02% of the case with in-order execution. The designed module worked at 2.35-fold speed of Intel Core 2 Duo.