Study on Packaging Method Using Silicon Substrate With Cavity and TSV for Light Emitting Diodes

摘要

In this paper, a wafer-level packaging method for white light emitting diodes (LEDs)—which uses a silicon substrate with cavities and through silicon vias (TSVs)—is presented. Common semiconductor manufacture processes are used to fabricate the substrate. Some key processes, such as wet etching, electroplating, and wire bonding are studied and optimized. This method offers a compact and low profile structure for LED packaging. The experimental results verify the feasibility of the proposed method. TSVs offer an electrical and thermal conductivity path for electrical interconnection and heat dissipation. Cavity can increase the light extraction efficiency and uniformity of the phosphor printing. And the thickness of the substrate where an LED chip is mounted is less than 200 um because of the cavity. The luminous power of one package unit is about 90 lm with 1 W LED chip when color temperature is 4200 K. The thermal resistance of the substrate only is about 1.3 K/W.