Post-layout Redundant Via Insertion Approach Considering Multiple Via Configuration

摘要

Yield loss caused by via failures is unacceptably high in many semiconductor manufacturing processes. Redundant via insertion (RVI) is a typical approach for improving manufacturing competitiveness. The double-via insertion in concurrent routing or post-routing stage is introduced to improve yield and reliability. However, RVI with double-via patterns requires a considerable routing resource, which limits the enhancement of RVI rate, especially in congested designs. In this paper, an efficient and effective post-layout RVI approach is proposed. The proposed RVI method is the first to overcome the limitation of double-via insertion by combining double-via and rectangle-via patterns. The proposed RVI method determines the via configuration used in a two-phase flow which can effectively increase the insertion rate of total via which is dominated by via1. Experimental results show that the proposed method uses multi-via mechanisms to improve the total via insertion rate in RVI designs from 86.8 to 92.7 % and to improve the via1 insertion rate from 73.5 to 85.1 %.