On the application of symbolic techniques to the multiple faultlocation in low testability analog circuits

摘要

A new approach for the multiple fault location in linear analogncircuits is proposed. It presents the characteristic of using classicalnnumerical procedures together with symbolic analysis techniques, whichnis particularly useful in the parametric fault diagnosis field. Thenproposed approach is based on the k-fault hypothesis and is providednwith efficient algorithms for fault location also in the case of lowntestability circuits. The developed algorithms have been used fornrealizing a software package prototype which implements a fullynautomated system for the fault location in linear analog circuits ofnmoderate size