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A 0.5/0.8-V 9-GHz Frequency Synthesizer With Doubling Generation in 0.13- CMOS

机译:在0.13-CMOS中具有加倍生成功能的0.5 / 0.8-V 9-GHz频率合成器

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To lower the supply voltage for high-frequency operation, a fully integrated frequency synthesizer, together with regenerative frequency-doubling and fractional phase-rotating techniques, is presented. The frequency-doubling circuit regenerates the tail signals at twice the frequency of the quadrature voltage-controlled oscillator (QVCO) to achieve larger output swing and higher operating frequency for the synthesizer. Additionally, a hybrid circuit utilizing a new folded regime for the first-stage divider and the phase-rotating circuit is developed in the prescaler. Under full-speed operation, the QVCO with the frequency doubler and the divider can work from a 0.5-V supply, whereas the synthesizer dissipates 12 mW. At 9.1-GHz carrier frequency, the measured phase noise is $-$104.5 dBc/Hz from 1-MHz offset.
机译:为了降低高频工作的电源电压,提出了一种完全集成的频率合成器,以及再生倍频和分数相旋转技术。倍频电路以正交压控振荡器(QVCO)两倍的频率再生尾部信号,从而为合成器实现更大的输出摆幅和更高的工作频率。另外,在预分频器中开发了一种混合电路,该混合电路将新的折叠方式用于第一级分频器和相位旋转电路。在全速运行下,具有倍频器和分频器的QVCO可以在0.5V电源下工作,而合成器的功耗为12mW。在9.1 GHz载波频率下,从1 MHz偏移处测得的相位噪声为$-$ 104.5 dBc / Hz。

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