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A 6-GHz All-Digital Fractional- Frequency Synthesizer Using FIR-Embedded Noise Filtering Technique

机译:采用FIR嵌入式噪声滤波技术的6 GHz全数字小数频率合成器

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摘要

A 6-GHz all-digital fractional-$N$ frequency synthesizer using an FIR-embedded noise filtering technique is presented. This noise filtering technique is realized in the digital domain without multiple matched analog components. This fractional-$N$ frequency synthesizer is fabricated in a 90-nm CMOS process, and it occupies 0.18 $hbox{mm}^{2}$. Its power is 28.8 mW with a supply of 1.2 V. The measured out-of-band phase noise at an offset of half the reference frequency is improved by more than 13 dB around 6 GHz considering cancellation variations for different output frequencies.
机译:提出了一种采用FIR嵌入式噪声滤波技术的6 GHz全数字分数-$ N $频率合成器。这种噪声过滤技术是在数字域中实现的,无需多个匹配的模拟组件。这种分数-$ N $频率合成器是在90-nm CMOS工艺中制造的,它占据了0.18 $ hbox {mm} ^ {2} $。它的功率为28.8 mW,电源电压为1.2V。考虑到不同输出频率的抵消变化,在参考频率一半的偏移量处测得的带外相位噪声在6 GHz附近改善了13 dB以上。

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