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Stability Analysis of Bang-Bang Phase-Locked Loops for Clock and Data Recovery Systems

机译:时钟和数据恢复系统的Bang-Bang锁相环的稳定性分析

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Bang-bang phase detector-based phase-locked loops (PLLs) with first- and second-order analog loop filters (LFs) are considered. Discrete-time (DT) models are presented for the bang-bang PLLs (BPLLs) in the presence of loop delays. The DT models show that the delay introduces an additional pole at $z = 0$ in the DT open-loop transfer function. The pole is of multiple order proportional to the delay, indicating that the system is prone to be unstable. Stability analysis of the BPLLs is conducted to derive stability conditions, taking advantage of the radius of curvature technique to facilitate numerical calculations involved. It is shown that the stability conditions depend on the LF parameters, the loop delay, and the update time of the BPLLs.
机译:考虑具有一阶和二阶模拟环路滤波器(LF)的基于Bang-bang相位检测器的锁相环(PLL)。在存在环路延迟的情况下,针对Bang-bang PLL(BPLL)提出了离散时间(DT)模型。 DT模型表明,在DT开环传递函数中,延迟在$ z = 0 $处引入了一个附加极点。极点具有与延迟成正比的多阶,表明系统倾向于不稳定。利用曲率半径技术来简化所涉及的数值计算,对BPLL进行稳定性分析以得出稳定性条件。结果表明,稳定性条件取决于LF参数,环路延迟和BPLL的更新时间。

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