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Transition layers at the SiO_2/SiC interface

机译:SiO_2 / SiC界面处的过渡层

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摘要

The electrical performance of SiC-based microelectronic devices is strongly affected by the densities of interfacial traps introduced by the chemical and structural changes at the SiO_2/SiC interface during processing. We analyzed the structure and chemistry of this interface for the thermally grown SiO_2/4H-SiC heterostructure using high-resolution transmission electron microscopy (TEM), Z-contrast scanning TEM, and spatially resolved electron energy-loss spectroscopy. The analyses revealed the presence of distinct layers, several nanometers thick, on each side of the interface; additionally, partial amorphization of the top SiC surface was observed. These interfacial layers were attributed to the formation of a ternary Si-C-O phase during thermal oxidation.
机译:SiC基微电子器件的电性能受加工过程中SiO_2 / SiC界面处化学和结构变化引入的界面陷阱密度的强烈影响。我们使用高分辨率透射电子显微镜(TEM),Z射线扫描TEM和空间分辨电子能量损失谱分析了热生长的SiO_2 / 4H-SiC异质结构的该界面的结构和化学性质。分析表明,界面的每一侧都存在着几纳米厚的不同层。另外,观察到顶部SiC表面的部分非晶化。这些界面层归因于热氧化过程中三元Si-C-O相的形成。

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