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首页> 外文期刊>Applied Physics Letters >Reduction of gate hysteresis above ambient temperature via ambipolar pulsed gate sweeps in carbon nanotube field effect transistors for sensor applications
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Reduction of gate hysteresis above ambient temperature via ambipolar pulsed gate sweeps in carbon nanotube field effect transistors for sensor applications

机译:通过用于传感器应用的碳纳米管场效应晶体管中的双极性脉冲栅极扫描,降低高于环境温度的栅极磁滞

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摘要

We investigate the hysteresis behavior in carbon nanotube (CNT) field effect transistors (CNFETs) upon pulsed gate voltages (V_g) above ambient temperature within 300-390 K. Assuming charge trapping near the CNT channel to be the major mechanism behind gate hysteresis, we perform charge trapping experiments based on V_g pulses and find that CNFET charge trapping is increasing with temperature. We assess the impact of thermally enhanced charge trapping on the hysteresis reduction performance of two different pulsed V_g sweeps. One of the two sweeps, consisting of alternating polarity pulses, is shown to essentially eliminate gate hysteresis in the studied temperature range.
机译:我们研究了在高于环境温度300-390 K内的脉冲栅极电压(V_g)时,碳纳米管(CNT)场效应晶体管(CNFET)的磁滞行为。假设CNT沟道附近的电荷陷阱是栅极滞后的主要机理,根据V_g脉冲执行电荷捕获实验,发现CNFET电荷捕获随温度增加。我们评估了热增强电荷陷阱对两个不同脉冲V_g扫描的磁滞降低性能的影响。显示了由交替极性脉冲组成的两次扫描之一,可以在所研究的温度范围内基本消除栅极磁滞。

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  • 来源
    《Applied Physics Letters》 |2010年第15期|p.153103.1-153103.3|共3页
  • 作者单位

    Department of Mechanical and Process Engineering, Micro and Nanosystems, ETH Zurich,8092 Zurich, Switzerland;

    rnDepartment of Mechanical and Process Engineering, Micro and Nanosystems, ETH Zurich,8092 Zurich, Switzerland;

    rnDepartment of Mechanical and Process Engineering, Micro and Nanosystems, ETH Zurich,8092 Zurich, Switzerland;

    rnDepartment of Mechanical and Process Engineering, Micro and Nanosystems, ETH Zurich,8092 Zurich, Switzerland;

    rnDepartment of Mechanical and Process Engineering, Micro and Nanosystems, ETH Zurich,8092 Zurich, Switzerland;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);美国《生物学医学文摘》(MEDLINE);
  • 原文格式 PDF
  • 正文语种 eng
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