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首页> 外文期刊>IEEE Transactions on Advanced Packaging >Electrical Characterization of Flip-Chip Interconnects Formed Using A Novel Conductive-Adhesive-Based Process
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Electrical Characterization of Flip-Chip Interconnects Formed Using A Novel Conductive-Adhesive-Based Process

机译:使用新型基于导电胶的工艺形成的倒装芯片互连的电气特性

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Using conventional microfabrication techniques, we have developed a new, low-cost wafer bumping process that enables a high degree of control over patterning of conductive adhesive interconnects. This approach obviates the need for development of dispensing and scraping head equipment that may otherwise be required for mass fabrication of lithographically patterned adhesive bumps. Flip-chip interconnects formed using this new process offer better electrical performance as compared to those formed by squeegee-based definition techniques. This is inferred in this paper by experimentally demonstrating lower contact resistance with the polished bumps as compared to the squeegeed bumps. Furthermore, in order to study the high-speed electrical performance characteristics of these conductive adhesive bumps, a 10-GHz 1.55-μm p-i-n photodetector fabricated in the antimonide material system was used as case study. The results from the bandwidth characterization of the polymer flip-chip-integrated detector showed minimum degradation in the high-speed performance characteristics of the detector.
机译:通过使用传统的微细加工技术,我们开发了一种新型的低成本晶圆隆起工艺,该工艺可以高度控制导电粘合剂互连的图案。该方法消除了对分配和刮擦头设备的开发的需求,否则可能需要大量制造光刻图案化的粘合剂凸块。与通过刮板的清晰度技术形成的倒装芯片互连相比,使用这种新工艺形成的倒装芯片互连具有更好的电气性能。在本文中,这是通过实验证明与抛光凸点相比,抛光凸点的接触电阻更低。此外,为了研究这些导电胶块的高速电性能特征,以锑化物材料系统中制造的10-GHz1.55-μmp-i-n光电探测器为案例研究。聚合物倒装芯片集成检测器的带宽表征结果表明,该检测器的高速性能特征降幅最小。

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