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首页> 外文期刊>IEEE Transactions on Advanced Packaging >Determination of Measurement Limit for Open Solder Bumps on a Flip-Chip Package Using a Laser Ultrasonic Inspection System
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Determination of Measurement Limit for Open Solder Bumps on a Flip-Chip Package Using a Laser Ultrasonic Inspection System

机译:使用激光超声检查系统确定倒装芯片封装上裸露焊锡的测量极限

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摘要

The adoption of surface-mount technology has spurred a rapid decrease in the size of electronic packages. Advanced active component packages, such as flip-chips, chip scale packages (CSPs), and ball grid arrays (BGAs), are attached to a printed wiring board (PWB) with small solder bumps between the bottom of the device and the board. The attachment method reduces package size, but the solder connections are no longer visible for inspection. Although lead frame packages can be inspected using automated camera equipment, other techniques, such as scanning acoustic microscopy (SAM) and automated X-ray inspection (AXI), have been used for screening these advanced packages for missing and shorted solder joints online in a manufacturing facility. However, they have trouble identifying open solder joints, especially when applied on-line. An inspection system based on laser-generated ultrasound and interferometric techniques has been developed. The system uses short pulses of high-intensity infrared energy from an Nd:YAG laser to excite the bulk of a chip into vibration through the principle of laser-generated ultrasound. The vibration response of a reference good chip attached to the substrate is measured and compared with vibration responses from other chips. Changes in the vibration response indicate a change in the quality of the chip or its attachment to the PWB. Previously, this system has been used to identify misalignment in CSPs and flip-chips, to identify missing solder bumps, and for detecting structural cracks in chips. In this paper, the ability of the current inspection system to identify open solder joints is investigated. Peripheral array, 48-bump daisy-chain flip-chips (PB18) without underfill were used as a test vehicle. This flip-chip has a higher I/O count and smaller, more closely spaced bumps than previous flip-chip specimens. Individual solder pads were removed from the PWB design, and test specimens with zero to seven adjacent open solder bumps were created. After exciting the chips with laser pulses, the impulse responses at 48 points on the surface of each chip were recorded. Data analysis is performed to compare the responses from reference chips and chips with open solder joints. Results show that the system has the ability to detect open joints for the flip-chip package, and statistical analysis of the results from repeated comparisons between the good and defective chips is employed to establish a detection threshold.
机译:表面贴装技术的采用促使电子封装的尺寸迅速减小。先进的有源元件封装,例如倒装芯片,芯片级封装(CSP)和球栅阵列(BGA),通过设备底部和电路板之间的小焊料凸点连接到印刷线路板(PWB)。固定方法可减小包装尺寸,但焊接后不再可见焊料连接。尽管可以使用自动摄像设备检查引线框封装,但已使用其他技术(例如扫描声显微镜(SAM)和自动X射线检查(AXI))来在线筛选这些高级封装中的焊点是否缺失和短路。生产设施。但是,他们很难识别开路焊点,尤其是在线应用时。已经开发了基于激光产生的超声和干涉技术的检查系统。该系统利用来自Nd:YAG激光器的短脉冲高强度红外能量,通过激光产生的超声波原理将芯片的大部分激发成振动。测量附着在基板上的参考品芯片的振动响应,并将其与其他芯片的振动响应进行比较。振动响应的变化表明芯片或其与PWB的连接质量发生了变化。以前,该系统已用于识别CSP和倒装芯片中的未对准,识别缺失的焊料凸点以及检测芯片中的结构裂纹。在本文中,研究了当前检查系统识别开路焊点的能力。外围阵列,无底部填充的48凸点菊花链倒装芯片(PB18)被用作测试工具。与以前的倒装芯片样本相比,该倒装芯片具有更高的I / O数量和更小,更紧密的凸点。从PWB设计中移除了各个焊盘,并创建了具有零至七个相邻开口焊料凸点的测试样品。用激光脉冲激励芯片后,记录每个芯片表面48个点的脉冲响应。进行数据分析以比较参考芯片和带有开放焊点的芯片的响应。结果表明,该系统具有检测倒装芯片封装中的开放接缝的能力,并且通过对良品和次品芯片之间反复比较得出的结果进行统计分析,以建立检测阈值。

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