Fabrication and characterization of GaN-based high electron mobility transistors.

摘要

Aluminum nitride (AlN) was employed as a gate insulator and a passivation layer. By introducing AlN as the gate insulator, the gate modulation can be extended from 2 V to 4 V, for a Schottky gate HEMT. Moreover, the subthreshold leakage current was suppressed to 1.13 nA/mm and thus the on/off ratio was increased to 3.3E8. Besides reducing the leakage current, the effectiveness of passivation was observed. The IDS only showed a 7% dispersion at 100kHz. In addition, off-state drain breakdown voltage (VBR) over 2000 V and specific on resistance of 10.9 mO-cm2 at drain to gate distance of 37.5 microm were achieved.;The effects of proton, gamma and electron irradiation on AlGaN / GaN HEMT DC performance were investigated. For proton irradiation, the mechanism of VBR improvement was investigated through backside proton irradiation. The result indicating the increase of VBR was from the reduction of peak electric field on the gate edges due to the extra charges created by irradiated defects. For gamma irradiation, AlGaN/GaN HEMTs were irradiated at doses of 50, 300, 450, or 700 Gy at a fixed energy of 10MeV. After irradiation, IDS proportionally increased with the dose due to the increase of mobility and reached a maximum of 10% with a dose of 700 Gy. For electron irradiation, the capacitance-voltage curve shifted positively after irradiation due to the increase of deep acceptor traps in the barrier/interface region. In AlGaN/GaN/Si transistors, the increases of deep barrier/interface traps with activation energy of 0.3, 0.55, 0.8 eV were observed. These increases correlated with the current dispersion at gate lag measurement.;Novel structure with a backside metal via under the active area of the HEMT was also proposed. It is found out by simulations that the thermal resistance decreased 17% by removing the thermal resistive nucleation layer and filling the via with Cu. Besides, the maximum junction temperature could be decreased from 146°C to 120°C at a power density of 5 W/mm. Furthermore, V BR could be improved by 10% upon connecting the via with the front-side gate. By biasing the backside gate at -25 V, VBR could be improved by 40%.