Integrating selective silicon epitaxy with thin sidewall spacers for submicron elevated source/drain MOSFETs.

摘要

As the dimensions of MOSFET devices are scaled down with physical gate lengths smaller than 0.1 ;In this work, the damage created to oxides and oxynitrides by selective silicon epitaxy was investigated. The possible degradation mechanisms which can occur to thin insulators in the epitaxy environment were identified and discussed. To isolate the specific degradation mechanisms, capacitors were fabricated with gate dielectrics that were exposed to RTCVD