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Microstructure study of electroplated copper films for ULSI metal interconnections.

机译:用于ULSI金属互连的电镀铜膜的微观结构研究。

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摘要

Microstructure control of electroplated Cu film is an issue of vital importance in Cu manufacturing process and interconnect reliability. This research explores the microstructure control in electroplated Cu films. Factors that affect the microstructure of the Cu films and underlying mechanisms have been identified, and their correlations have been investigated in both theoretical and experimental approaches.; The large grain size of electroplated Cu films results from a remarkable secondary grain growth at room temperature after deposition, so-called “self-annealing” or “room-temperature recrystallization.” During the self-annealing, the grain size increases by about an order of magnitude, from ∼0.1 μm to ∼1 μm, accompanied by a reduction in sheet resistance by about 20%. Degradation of (111) texture, enhancement of (200) texture, and development of stress towards the tensile direction are also observed in the film during the self-annealing process. The rate of the self-annealing process increases drastically as the plating current density is increased. Strong correlation between stress and texture development was found for all electroplated Cu films under the self- and thermal annealing. This correlation is explained by the surface/interface energy and strain energy in anisotropic metal films. Texture remains unchanged until when the biaxial stress in the film exceeds a critical value, and over the critical stress, the (111) texture starts to degrade and the (200) start to enhance to reduce the strain energy in the film. The existence of a high density of dislocation loops in the pre-recrystallization grains of as-deposited films were demonstrated as a driving force of the abnormally fast grain growth during self-annealing at room temperature. Plating with a higher deposition rate produces more dislocation loops in the Cu film, leading to faster self-annealing rate. The kinetic calculation with the inclusion of the dislocation loop energy demonstrates a good correspondence with the experimental observations. The grain size is small in the Cu film plated on a rough underlying seed layer surface due to the significant retardation of the self-annealing process. Strong texture in the electroplated film is observed only when plated on a strongly textured and smooth seed layer.
机译:电镀铜膜的微结构控制是铜制造工艺和互连可靠性中至关重要的问题。这项研究探索了电镀铜膜的微观结构控制。已经确定了影响铜膜微结构的因素和潜在机理,并且已经在理论和实验方法中研究了它们的相关性。电镀铜膜的大晶粒尺寸是由沉积后室温下明显的二次晶粒生长引起的,即所谓的“自退火”或“室温再结晶”。在自退火过程中,晶粒尺寸从〜0.1μm增大到〜1μm约一个数量级,同时薄层电阻减小了约20%。在自退火过程中,在膜中还观察到(111)织构的退化,(200)织构的增强以及朝向拉伸方向的应力的发展。随着电镀电流密度的增加,自退火过程的速率急剧增加。在自退火和热退火下,所有电镀铜膜的应力和织构发展之间都存在很强的相关性。这种相关性由各向异性金属膜中的表面/界面能和应变能解释。直到薄膜中的双轴应力超过临界值时,织构一直保持不变,并且在临界应力之上,(111)织构开始退化,(200)开始增强以降低薄膜中的应变能。沉积膜的预重结晶晶粒中高位错环的存在被证明是室温自退火过程中异常快速晶粒生长的驱动力。较高沉积速率的镀覆会在Cu膜中产生更多的位错环,从而导致更快的自退火速率。包含位错环能量的动力学计算证明与实验观察结果具有良好的对应性。由于自退火过程的显着延迟,在粗糙的下层种子层表面上镀的Cu膜的晶粒尺寸很小。仅当电镀在坚固纹理和光滑的种子层上时,才能观察到电镀膜中的坚固纹理。

著录项

  • 作者

    Lee, Haebum.;

  • 作者单位

    Stanford University.;

  • 授予单位 Stanford University.;
  • 学科 Engineering Materials Science.; Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2001
  • 页码 158 p.
  • 总页数 158
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 工程材料学;无线电电子学、电信技术;
  • 关键词

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