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CMP Compatibility of Partially Cured Benzocyclobutene (BCB) for a Via-First 3D IC Process

机译:部分固化的苯并环丁烯(BCB)的CMP兼容性,可用于Via-First 3D IC工艺

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Wafer-level three dimensional (3D) IC technology offers the promise of decreasing RC delays by reducing long interconnect lines in high performance ICs. This paper focuses on a via-first 3D IC platform, which utilizes a back-end-of-line (BEOL) compatible damascene-patterned layer of copper and Benzocyclobutene (BCB). This damascene-patterned copper/BCB serves as a redistribution layer between two fully fabricated wafer sets of ICs and offers the potential of high bonding strength and low contact resistance for inter-wafer interconnects between the wafer pair. The process would thus combine the electrical advantages of 3D technology using Cu-to-Cu bonding with the mechanical advantages of 3D technology using BCB-to-BCB bonding. In this work, partially cured BCB has been evaluated for copper damascene patterning using commercially available CMP slurries as a key process step for a via-first 3D process flow. BCB is spin-cast on 200 mm wafers and cured at temperatures ranging from 190℃ to 250℃, providing a wide range of crosslink percentage. These films are evaluated for CMP removal rate, surface damage (surface scratching and embedded abrasives), and planarity with commercially available copper CMP slurries. Under baseline process parameters, erosion, and roughness changes are presented for single-level damascene test patterns. After wafers are bonded under controlled temperature and pressure, the bonding interface is inspected optically using glass-to-silicon bonded wafers, and the bond strength is evaluated by a razor blade test.
机译:晶圆级三维(3D)IC技术有望通过减少高性能IC中的长互连线来减少RC延迟。本文重点介绍了一种先通孔的3D IC平台,该平台利用了与铜和苯并环丁烯(BCB)兼容的线后(BEOL)镶嵌图案层。镶嵌图案的铜/ BCB用作两个完整制造的晶片组IC之间的重新分布层,并为晶片对之间的晶片间互连提供了高结合强度和低接触电阻的潜力。因此,该过程将结合使用Cu-to-Cu键合的3D技术的电气优势和使用BCB-BCB键合的3D技术的机械优势。在这项工作中,已经对部分固化的BCB进行了铜镶嵌图案的评估,该图案使用市售CMP浆料作为过孔优先3D工艺流程的关键工艺步骤。 BCB在200 mm晶圆上旋转浇铸,并在190℃至250℃的温度范围内固化,从而提供了广泛的交联百分比。使用市售铜CMP浆料评估这些膜的CMP去除率,表面损伤(表面刮擦和嵌入的磨料)以及平面度。在基线工艺参数下,给出了单层镶嵌测试图案的腐蚀和粗糙度变化。在受控的温度和压力下键合晶片后,使用玻璃硅键合晶片对键合界面进行光学检查,并通过剃须刀测试评估键合强度。

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